1. Field of the Invention
The present invention generally relates to a clock generator and a biasing circuit adopted in the clock generator. More specifically, the present invention relates to a clock generator that provides stable clock signals without utilizing a crystal oscillator.
2. Description of the Prior Art
It is very important to provide stable clock signals in signal processing systems. Please refer to FIG. 1. FIG. 1 shows a block diagram of a prior art analog phase-locked loop 100. The analog phase-locked loop (PLL) 100 includes a crystal oscillator (XO) 110, a frequency divider 120, a phase-frequency detector (PFD) 130, a charge pump 140, a loop filter 150 and a voltage-controlled oscillator (VCO) 160. The analog PLL 100 utilizes the frequency divider 120 to divide oscillator signals FVCO output by the VCO 160 by a multiple, and evaluates the differences of phase and frequency between the output signals from the frequency divider 120 and the reference clock signals Fref generated from the crystal oscillator 110 by using the PFD 130, so as to generate difference signals. The charge pump 140 charges the loop filter 150 according to the difference signals, and the loop filter 150 generates a control voltage Vc accordingly. The VCO 160 outputs an oscillation signal FVCO corresponding to the control voltage Vc. In this manner, the PLL 100 can provide stable clock signals with the aid of the stable reference clock signals Fref generated from the crystal oscillator 110, and can change the frequency of output oscillation signals by varying the frequency-dividing multiple of the frequency divider 120. There are PLLs of different structures, including digital ones. However, in every kind of PLL, for providing an accurate reference clock signal, the crystal oscillator cannot be replaced with any other common clock generator. There are many kinds of oscillators. However, crystal oscillators of high accuracy and low noise are expensive. No matter what category of the oscillator is utilized, the cost of the oscillator is usually the significant part of the cost of the total PLL. Hence the effect of decreasing cost by simplifying or changing components other than the crystal oscillator is quite limited. Still, utilizing oscillators other than crystal oscillators results in jitter generated by the flicker noise and thermal noise of the oscillation signals, which locate at low frequencies. In video signal systems, the problem of jitter at low frequency is more serious since the jitter locates around the frequency of HSYNC signals.